DPL1 EQU 084h ; DS80C320 DPH1 EQU 085h ; DS80C320 DPS EQU 086h ; DS80C320 CKCON EQU 08Eh ; DS80C320 EXIF EQU 091h ; DS80C320 SCON1 EQU 0C0h ; DS80C320 SBUF1 EQU 0C1h ; DS80C320 TA EQU 0C7h ; DS80C320 WDCON EQU 0D8h ; DS80C320 EIE EQU 0E8h ; DS80C320 EIP EQU 0F8h ; DS80C320 dc_status EQU 020h dc_ir EQU 028h dc_dsr1 EQU 029h dc_dsr2 EQU 02Ah dc_der EQU 02Bh dc_lsr EQU 02Ch dc_d2_rec_typ EQU 02Dh kyb_data_p_irq EQU 030h ; Tasten-Code kyb_data_p_main EQU 031h ; Tasten-Code period_timer EQU 034h period_min EQU 035h rtc_cal EQU 036h dc_d2_tei EQU 040h dc_d2_ns EQU 041h dc_d2_nr EQU 042h dc_d3_cr EQU 048h dc_bc_nr EQU 04Ch dc_trans_buf_l EQU 068h dc_trans_buf_p EQU 069h dc_reciv_buf_l EQU 06Ah dc_reciv_buf_p EQU 06Bh menu_back_h EQU 070h menu_back_l EQU 071h input_buffer_p EQU 07Fh input_buffer EQU 080h ; Eingabe Buffer 020h Bytes menu_start_adr EQU 0A0h ; Start Addresse Menu Tasten 010h Bytes kyb_data_buffer EQU 0B0h ; Tasten-Code stack_init EQU 0BFh ; STACK 040h Bytes ; ----------------------------------------------------------------------------- input_buf_max EQU 014h X_Dc_Trans_Buf EQU 01000h ; D-Chanel Transmit Buffer 4 * 0FFh Bytes X_Dc_Reciv_Buf EQU 02000h ; D-Chanel Reciece Buffer 4 * 0FFh Bytes Dc_buffer_max EQU 0FFh X_RTC_Ctrl EQU 09FF8h X_RTC_Sec EQU 09FF9h X_RTC_Min EQU 09FFAh X_RTC_Hour EQU 09FFBh X_RTC_Day EQU 09FFCh X_RTC_Date EQU 09FFDh X_RTC_Month EQU 09FFEh X_RTC_Year EQU 09FFFh X_LCD_Ctrl EQU 0A000h X_LCD_Data EQU 0A001h X_KYB EQU 0C000h X_DSC_CrIr EQU 0E000h X_DSC_Data EQU 0E001h X_DSC_dsr1 EQU 0E002h X_DSC_der EQU 0E003h X_DSC_DCB EQU 0E004h X_DSC_BbB EQU 0E005h X_DSC_BcB EQU 0E006h X_DSC_dsr2 EQU 0E007h R_DSC_CrIr EQU 000h ; Command / Intrrupt R/W R_DSC_Data EQU 001h ; Data R/W R_DSC_dsr1 EQU 002h ; Dc Status Reg. Nr1 R 1 R_DSC_der EQU 003h ; Dc Error Reg. R 2 R_DSC_DCB EQU 004h ; Dc Data R/W 8/16/32 R_DSC_BbB EQU 005h ; Bb Data R/W 1 R_DSC_BcB EQU 006h ; Bc Data R/W 1 R_DSC_dsr2 EQU 007h ; Dc Status Reg. Nr2 R DSCi_init EQU 021h ; Init Reg. R/W 1 DSCi_init2 EQU 020h ; Init Reg. Nr2 R/W 1 DSCi_lsr EQU 0A1h ; LIU Status Reg. R 1 DSCi_lpr EQU 0A2h ; LIU Priority Reg. R/W 1 DSCi_lmr1 EQU 0A3h ; LIU Mode Reg. Nr1 R/W 1 DSCi_lmr2 EQU 0A4h ; LIU Mode Reg. Nr2 R/W 1 DSCi_mf EQU 0A6h ; LIU MultiFrame Reg. R/W 1 DSCi_mfsb EQU 0A7h ; LIU S-Bit Status Reg. R 1 DSCi_mfqb EQU 0A8h ; LIU Q-Bit Buffer W 1 DSCi_mcr1 EQU 041h ; MUX Control Reg. Nr1 R/W 1 DSCi_mcr2 EQU 042h ; MUX Control Reg. Nr2 R/W 1 DSCi_mcr3 EQU 043h ; MUX Control Reg. Nr3 R/W 1 DSCi_mcr4 EQU 044h ; MUX Control Reg. Nr4 R/W 1 DSCi_xcoef EQU 061h ; MAP X-Filter Coef. R/W 8 DSCi_rcoef EQU 062h ; MAP R-Filter Coef. R/W 8 DSCi_gxcoef EQU 063h ; MAP GX Gain Coef. R/W 2 DSCi_grcoef EQU 064h ; MAP GR Gain Coef. R/W 2 DSCi_gercoef EQU 065h ; MAP GER Gain Coef. R/W 2 DSCi_stgcoef EQU 066h ; MAP Sidetone Gain R/W 2 DSCi_ftgr EQU 067h ; MAP Freq. Tone Gen. R/W 2 DSCi_atgr EQU 068h ; MAP Ampl. Tone Gen. R/W 2 DSCi_mmr1 EQU 069h ; MAP Mode Reg. Nr1 R/W 1 DSCi_mmr2 EQU 06Ah ; MAP Mode Reg. Nr2 R/W 1 DSCi_mmr3 EQU 06Ch ; MAP Mode Reg. Nr3 R/W 1 DSCi_stra EQU 06Dh ; MAP Sec. Tone Ampl. R/W 1 DSCi_strf EQU 06Eh ; MAP Sec. Tone Freq. R/W 1 DSCi_peakx EQU 070h ; MAP Trans Peak Reg. R 1 DSCi_peakr EQU 071h ; MAP Reciv Peak Reg. R 1 DSCi_frar EQU 081h ; DLC First Reciv Adr R/W 3 DSCi_srar EQU 082h ; DLC Sec. Reciv Adr R/W 3 DSCi_tar EQU 083h ; DLC Trans Addr Reg. R/W 2 DSCi_drlr EQU 084h ; DLC Dc Reciv Limit R/W 2 DSCi_dtcr EQU 085h ; DLC Dc Trans Count R/W 2 DSCi_dmr1 EQU 086h ; DLC Mode Reg. Nr 1 R/W 1 DSCi_dmr2 EQU 087h ; DLC Mode Reg. Nr 2 R/W 2 DSCi_drcr EQU 089h ; DLC Dc Reciv Count R 2 DSCi_rngr1 EQU 08Ah ; DLC Random Gen. Nr1 R/W 1 DSCi_rngr2 EQU 08Bh ; DLC Random Gen. Nr2 R/W 1 DSCi_frar4 EQU 08Ch ; DLC First Reciv Adr4 R/W 1 DSCi_srar4 EQU 08Dh ; DLC Sec. Reciv Adr4 R/W 1 DSCi_dmr3 EQU 08Eh ; DLC Mode Reg. Nr 3 R/W 1 DSCi_dmr4 EQU 08Fh ; DLC Mode Reg. Nr 4 R/W 1 DSCi_asr EQU 091h ; DLC Adr Status Reg. R 1 DSCi_efcr EQU 092h ; DLC Ext. FIFO Ctrl. R/W 1 DSCi_ppcr1 EQU 0C0h ; PP Ctrl. Reg. Nr1 R/W 1 DSCi_ppsr EQU 0C1h ; PP Status Reg. R 1 DSCi_ppier EQU 0C2h ; PP Irq Enable Reg. R/W 1 DSCi_mdr EQU 0C3h ; PP Monitor Data R/W 1 DSCi_cidr0 EQU 0C4h ; PP C/I Data 0 R/W 1 DSCi_cidr1 EQU 0C5h ; PP C/I Data 1 R/W 1 DSCi_ppcr2 EQU 0C8h ; PP Ctrl. Reg. Nr2 R/W 1 DSCi_ppcr3 EQU 0C9h ; PP Ctrl. Reg. Nr3 R/W 1 ; ----------------------------------------------------------------------------- ORG 00000h ; RESET JMP start ORG 00003h ; IRQ Extern0 LJMP irq_isdn ORG 0000Bh ; IRQ Timer0 RETI ORG 00013h ; IRQ Extern1 LJMP irq_kyb ORG 0001Bh ; IRQ Timer1 RETI ORG 00023h ; IRQ Serial0 RETI ORG 0002Bh ; IRQ Timer2 RETI ORG 00033h ; IRQ Power Fail RETI ORG 0003Bh ; IRQ Serial1 RETI ORG 00043h ; IRQ Extern2 RETI ORG 0004Bh ; IRQ Extern3 RETI ORG 00053h ; IRQ Extern4 RETI ORG 0005Bh ; IRQ Extern5 RETI ORG 00063h ; IRQ Watchdog LJMP irq_period ; ----------------------------------------------------------------------------- ORG 00070h stack_error: MOV A, #001h CALL lcd_wr_ctrl MOV DPTR, #txt_stack_error CALL lcd_str SJMP $ ; ----------------------------------------------------------------------------- ORG 00080h start: MOV SP, #stack_init MOV R0, #000h CLR A mem_clr: MOV @R0, A INC R0 CJNE R0, #080h, mem_clr CALL cpu_init CALL lcd_init CALL inp_buf_init CALL menu_init CALL dsc_init MOV kyb_data_p_main, #000h MOV kyb_data_p_irq, #000h main_0: MOV A, SP CJNE A, #stack_init, stack_error main_1: MOV A, kyb_data_p_main CJNE A, kyb_data_p_irq, main_2 SJMP main_1 main_2: MOV R0, A INC A ANL A, #007h MOV kyb_data_p_main, A MOV A, R0 ADD A, #kyb_data_buffer MOV R0, A MOV A, @R0 CJNE A, #000h, main_3 SJMP main_0 main_3: JNB ACC.6, main_4 JB ACC.5, main_5 MOV DPS, #000h ; Gross Buchstabe DEC A ANL A, #007h RL A ADD A, #menu_start_adr MOV R0, A MOV A, @R0 MOV DPH, A INC R0 MOV A, @R0 MOV DPL, A CLR A JMP @A+DPTR main_4: JB dc_status.4, main_6 CALL inp_buf_add ; Ziffer LJMP main_0 main_6: LJMP main_dail main_5: ; Klien Buchstabe CJNE A, #'p', main_10 LJMP main_period main_10: CJNE A, #'o', main_11 LJMP main_hsw_off main_11: CJNE A, #'i', main_12 LJMP main_hsw_on main_12: CJNE A, #'r', main_13 LJMP main_isdn_reciv main_13: CJNE A, #'u', main_14 LJMP main_show_rtc main_14: CALL inp_buf_add LJMP main_0 ; ----------------------------------------------------------------------------- main_period: ; MOV A, #'p' ; CALL inp_buf_add LJMP main_0 main_hsw_off: CALL lcd_rd_ctrl MOV R2, A MOV A, #0A7h CALL lcd_wr_ctrl MOV A, #0A1h CALL lcd_wr_data MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl MOV DPS, #000h MOV DPTR, #dat_d3_discon CALL dc_send_d3_pack CLR dc_status.4 LJMP main_0 main_hsw_on: CALL lcd_rd_ctrl MOV R2, A MOV A, #0A7h CALL lcd_wr_ctrl MOV A, #0DFh CALL lcd_wr_data MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl JB dc_status.3, main_hsw_on_1 CALL dc_activate MOV A, #002h CALL wait_period CALL dc_sabme MOV A, #002h CALL wait_period MOV DPS, #000h MOV DPTR, #dat_d3_setup_a CALL dc_send_d3_pack SETB dc_status.4 LJMP main_0 main_hsw_on_1: MOV A, #007h CALL dc_send_d3_byte LJMP main_0 main_dail: MOV DPS, #001h MOV DPTR, #X_Dc_Trans_Buf MOV DPL1, #00Bh MOVX @DPTR, A MOV DPS, #000h MOV DPTR, #dat_d3_dail1 CALL dc_send_d3_pack LJMP main_0 ; ----------------------------------------------------------------------------- main_show_rtc: CALL lcd_rd_ctrl MOV R2, A MOV A, #0A0h CALL lcd_wr_ctrl MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh ORL A, #040h MOVX @DPTR, A MOV DPTR, #X_RTC_Hour MOVX A, @DPTR ANL A, #03Fh CALL lcd_hex_byte MOV A, #':' CALL lcd_wr_data MOV DPTR, #X_RTC_Min MOVX A, @DPTR ANL A, #07Fh CALL lcd_hex_byte MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh MOVX @DPTR, A MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl LJMP main_0 m_rtc_time: MOV A, input_buffer_p CJNE A, #input_buffer+0, m_rtc_time_1 SJMP m_rtc_time_2 m_rtc_time_1: CJNE A, #input_buffer+6, m_rtc_time_3 MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh ORL A, #080h MOVX @DPTR, A MOV A, #000h CALL get_byte_inp_buf ANL A, #03Fh MOV DPTR, #X_RTC_Hour MOVX @DPTR, A MOV A, #002h CALL get_byte_inp_buf ANL A, #07Fh MOV DPTR, #X_RTC_Min MOVX @DPTR, A MOV A, #004h CALL get_byte_inp_buf ANL A, #07Fh MOV DPTR, #X_RTC_Sec MOVX @DPTR, A MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh MOVX @DPTR, A CALL inp_buf_init LJMP main_0 m_rtc_time_2: MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh ORL A, #040h MOVX @DPTR, A MOV DPTR, #X_RTC_Hour MOVX A, @DPTR ANL A, #03Fh CALL put_byte_inp_buf MOV DPTR, #X_RTC_Min MOVX A, @DPTR ANL A, #07Fh CALL put_byte_inp_buf MOV DPTR, #X_RTC_Sec MOVX A, @DPTR ANL A, #07Fh CALL put_byte_inp_buf MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh MOVX @DPTR, A LJMP main_0 m_rtc_time_3: LJMP main_0 m_rtc_date: MOV A, input_buffer_p CJNE A, #input_buffer+0, m_rtc_date_1 SJMP m_rtc_date_2 m_rtc_date_1: CJNE A, #input_buffer+8, m_rtc_date_3 MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh ORL A, #080h MOVX @DPTR, A MOV A, #000h CALL get_byte_inp_buf ANL A, #03Fh MOV DPTR, #X_RTC_Year MOVX @DPTR, A MOV A, #002h CALL get_byte_inp_buf ANL A, #07Fh MOV DPTR, #X_RTC_Month MOVX @DPTR, A MOV A, #004h CALL get_byte_inp_buf ANL A, #07Fh MOV DPTR, #X_RTC_Date MOVX @DPTR, A MOV A, #006h CALL get_byte_inp_buf ANL A, #07Fh MOV DPTR, #X_RTC_Day MOVX @DPTR, A MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh MOVX @DPTR, A CALL inp_buf_init LJMP main_0 m_rtc_date_2: MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh ORL A, #040h MOVX @DPTR, A MOV DPTR, #X_RTC_Year MOVX A, @DPTR ANL A, #03Fh CALL put_byte_inp_buf MOV DPTR, #X_RTC_Month MOVX A, @DPTR ANL A, #07Fh CALL put_byte_inp_buf MOV DPTR, #X_RTC_Date MOVX A, @DPTR ANL A, #07Fh CALL put_byte_inp_buf MOV DPTR, #X_RTC_Day MOVX A, @DPTR ANL A, #07Fh CALL put_byte_inp_buf MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh MOVX @DPTR, A LJMP main_0 m_rtc_date_3: LJMP main_0 m_rtc_cal: MOV A, input_buffer_p CJNE A, #input_buffer+0, m_rtc_cal_1 SJMP m_rtc_cal_2 m_rtc_cal_1: CJNE A, #input_buffer+2, m_rtc_cal_3 CLR A CALL get_byte_inp_buf ANL A, #03Fh MOV DPTR, #X_RTC_Ctrl MOVX @DPTR, A CALL inp_buf_init LJMP main_0 m_rtc_cal_2: MOV DPTR, #X_RTC_Ctrl MOVX A, @DPTR ANL A, #03Fh CALL put_byte_inp_buf LJMP main_0 m_rtc_cal_3: LJMP main_0 m_rtc_go: MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh ORL A, #080h MOVX @DPTR, A MOV DPTR, #X_RTC_Sec MOV A, #000h MOVX @DPTR, A MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ANL A, #03Fh MOVX @DPTR, A LJMP main_0 m_rtc_stop: MOV DPTR, #X_RTC_Sec MOV A, #080h MOVX @DPTR, A LJMP main_0 ; ----------------------------------------------------------------------------- m_set_tei: MOV A, input_buffer_p CJNE A, #input_buffer+0, m_set_tei_1 SJMP m_set_tei_2 m_set_tei_1: CJNE A, #input_buffer+2, m_set_tei_3 CLR A CALL get_byte_inp_buf RL A ORL A, #001h MOV dc_d2_tei, A CALL inp_buf_init LJMP main_0 m_set_tei_2: MOV A, dc_d2_tei RR A ANL A, #07Fh CALL put_byte_inp_buf LJMP main_0 m_set_tei_3: LJMP main_0 ; ----------------------------------------------------------------------------- main_isdn_reciv: CALL isdn_d2_reciv MOV DPS, #000h MOV R3, dc_reciv_buf_l MOV DPTR, #X_Dc_Reciv_Buf MOVX A, @DPTR MOV R4, A MOV A, R3 DEC A MOV DPL, A MOVX A, @DPTR MOV R5, A CALL lcd_rd_ctrl MOV R2, A MOV A, #0A2h CALL lcd_wr_ctrl MOV A, R3 CALL lcd_hex_byte MOV A, R4 CALL lcd_hex_byte MOV A, R5 CALL lcd_hex_byte MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl JMP main_0 ; ----------------------------------------------------------------------------- ; ----------------------------------------------------------------------------- m_menu_main: MOV DPTR, #txt_main_menu CALL lcd_status CALL menu_init MOV DPS, #000h MOV DPTR, #m_menu_main MOV menu_back_h, DPH MOV menu_back_l, DPL LJMP main_0 m_menu_crypt: MOV DPTR, #txt_crypt_menu CALL lcd_status MOV A, #000h MOV DPTR, #mnu_main CALL menu_make MOV A, #001h MOV DPTR, #mnu_dsci CALL menu_make MOV A, #002h MOV DPTR, #mnu_mon_off CALL menu_make MOV A, #003h MOV DPTR, #mnu_c_mon_b1 CALL menu_make MOV A, #004h MOV DPTR, #mnu_c_mon_b2 CALL menu_make MOV A, #005h MOV DPTR, #mnu_c_mon_t_b1 CALL menu_make MOV A, #006h MOV DPTR, #mnu_c_mon_t_b2 CALL menu_make MOV A, #007h MOV DPTR, #mnu_ CALL menu_make LJMP main_0 m_menu_setup: MOV DPTR, #txt_setup_menu CALL lcd_status MOV A, #000h MOV DPTR, #mnu_main CALL menu_make MOV A, #001h MOV DPTR, #mnu_set_tei CALL menu_make MOV A, #002h MOV DPTR, #mnu_ CALL menu_make MOV A, #003h MOV DPTR, #mnu_ CALL menu_make MOV A, #004h MOV DPTR, #mnu_rtc CALL menu_make MOV A, #005h MOV DPTR, #mnu_ CALL menu_make MOV A, #006h MOV DPTR, #mnu_hex CALL menu_make MOV A, #007h MOV DPTR, #mnu_bksp CALL menu_make MOV DPS, #000h MOV DPTR, #m_menu_setup MOV menu_back_h, DPH MOV menu_back_l, DPL LJMP main_0 m_menu_mon: MOV DPTR, #txt_mon_menu CALL lcd_status MOV A, #000h MOV DPTR, #mnu_main CALL menu_make MOV A, #001h MOV DPTR, #mnu_dsci CALL menu_make MOV A, #002h MOV DPTR, #mnu_mon_off CALL menu_make MOV A, #003h MOV DPTR, #mnu_mon_b1 CALL menu_make MOV A, #004h MOV DPTR, #mnu_mon_b2 CALL menu_make MOV A, #005h MOV DPTR, #mnu_mon_t_b1 CALL menu_make MOV A, #006h MOV DPTR, #mnu_mon_t_b2 CALL menu_make MOV A, #007h MOV DPTR, #mnu_1khz CALL menu_make LJMP main_0 m_menu_dc: MOV DPTR, #txt_dc_menu CALL lcd_status MOV A, #000h MOV DPTR, #mnu_main CALL menu_make MOV A, #001h MOV DPTR, #mnu_lsr CALL menu_make MOV A, #002h MOV DPTR, #mnu_dsr CALL menu_make MOV A, #003h MOV DPTR, #mnu_dsci CALL menu_make MOV A, #004h MOV DPTR, #mnu_s0ac CALL menu_make MOV A, #005h MOV DPTR, #mnu_sabme CALL menu_make MOV A, #006h MOV DPTR, #mnu_ CALL menu_make MOV A, #007h MOV DPTR, #mnu_ CALL menu_make LJMP main_0 m_menu_rtc: MOV DPTR, #txt_rtc_menu CALL lcd_status MOV A, #000h MOV DPTR, #mnu_main CALL menu_make MOV A, #001h MOV DPTR, #mnu_rtc_time CALL menu_make MOV A, #002h MOV DPTR, #mnu_rtc_date CALL menu_make MOV A, #003h MOV DPTR, #mnu_rtc_cal CALL menu_make MOV A, #004h MOV DPTR, #mnu_rtc_stop CALL menu_make MOV A, #005h MOV DPTR, #mnu_rtc_go CALL menu_make MOV A, #006h MOV DPTR, #mnu_ CALL menu_make MOV A, #007h MOV DPTR, #mnu_bksp CALL menu_make LJMP main_0 m_dsci: CALL dsc_init LJMP main_0 m_bksp: CALL inp_buf_del LJMP main_0 m_mon_off: CALL dsc_b_off LJMP main_0 m_mon_b1: CALL dsc_b1_plain LJMP main_0 m_mon_b2: CALL dsc_b2_plain LJMP main_0 m_mon_t_b1: CALL dsc_t_b1_plain LJMP main_0 m_mon_t_b2: CALL dsc_t_b2_plain LJMP main_0 m_c_mon_b1: CALL dsc_b1_crypt LJMP main_0 m_c_mon_b2: CALL dsc_b2_crypt LJMP main_0 m_c_mon_t_b1: CALL dsc_t_b1_crypt LJMP main_0 m_c_mon_t_b2: CALL dsc_t_b2_crypt LJMP main_0 m_1khz: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_strf MOVX @R0, A MOV A, #003h MOVX @R1, A MOV A, #DSCi_stra MOVX @R0, A MOV A, #0A0h MOVX @R1, A MOV A, #DSCi_mmr3 MOVX @R0, A MOV A, #009h MOVX @R1, A MOV A, #DSCi_mmr2 MOVX @R0, A MOV A, #00Ah MOVX @R1, A SETB EA LJMP main_0 m_sabme: CALL dc_sabme LJMP main_0 m_s0ac: CALL dc_activate LJMP main_0 MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #050h MOVX @R1, A SETB EA LJMP main_0 m_lsr: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_lsr MOVX @R0, A MOVX A, @R1 SETB EA MOV R3, A CALL lcd_rd_ctrl MOV R2, A MOV A, #0A2h CALL lcd_wr_ctrl MOV A, R3 CALL lcd_hex_byte MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl LJMP main_0 m_dsr: MOV DPTR, #X_DSC_dsr1 MOVX A, @DPTR MOV R3, A MOV DPTR, #X_DSC_dsr2 MOVX A, @DPTR MOV R4, A MOV DPTR, #X_DSC_der MOVX A, @DPTR MOV R5, A CALL lcd_rd_ctrl MOV R2, A MOV A, #0A2h CALL lcd_wr_ctrl MOV A, R3 CALL lcd_hex_byte MOV A, R4 CALL lcd_hex_byte MOV A, R5 CALL lcd_hex_byte MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl LJMP main_0 ; ----------------------------------------------------------------------------- m_hex_menu: MOV DPTR, #txt_hex_menu CALL lcd_status MOV A, #000h MOV DPTR, #mnu_hex_back CALL menu_make MOV A, #001h MOV DPTR, #mnu_hex_a CALL menu_make MOV A, #002h MOV DPTR, #mnu_hex_b CALL menu_make MOV A, #003h MOV DPTR, #mnu_hex_c CALL menu_make MOV A, #004h MOV DPTR, #mnu_hex_d CALL menu_make MOV A, #005h MOV DPTR, #mnu_hex_e CALL menu_make MOV A, #006h MOV DPTR, #mnu_hex_f CALL menu_make MOV A, #007h MOV DPTR, #mnu_bksp CALL menu_make LJMP main_0 m_hex_a: MOV A, #'A' CALL inp_buf_add LJMP main_0 m_hex_b: MOV A, #'B' CALL inp_buf_add LJMP main_0 m_hex_c: MOV A, #'C' CALL inp_buf_add LJMP main_0 m_hex_d: MOV A, #'D' CALL inp_buf_add LJMP main_0 m_hex_e: MOV A, #'E' CALL inp_buf_add LJMP main_0 m_hex_f: MOV A, #'F' CALL inp_buf_add LJMP main_0 m_hex_back: MOV DPS, #000h MOV DPH, menu_back_h MOV DPL, menu_back_l CLR A JMP @A+DPTR ; ----------------------------------------------------------------------------- ; ----------------------------------------------------------------------------- inp_buf_init: MOV R0, #input_buffer MOV R7, #input_buf_max MOV A, #080h CALL lcd_wr_ctrl inp_buf_init_1: CLR A MOV @R0, A INC R0 MOV A, #020h CALL lcd_wr_data DJNZ R7, inp_buf_init_1 MOV A, #0FFh CALL lcd_wr_data MOV R0, #input_buffer MOV input_buffer_p, R0 MOV A, #080h CALL lcd_wr_ctrl RET inp_buf_add: MOV R2, A MOV R0, input_buffer_p MOV A, R0 CLR C SUBB A, #input_buffer CLR C SUBB A, #input_buf_max JNC inp_buf_add_1 MOV A, R2 MOV @R0, A INC R0 MOV input_buffer_p, R0 CALL lcd_wr_data inp_buf_add_1: RET inp_buf_del: MOV R0, input_buffer_p MOV A, R0 CLR C SUBB A, #input_buffer JC inp_buf_del_1 JZ inp_buf_del_1 DEC R0 CLR A MOV @R0, A MOV input_buffer_p, R0 MOV A, #010h CALL lcd_wr_ctrl MOV A, #020h CALL lcd_wr_data MOV A, #010h CALL lcd_wr_ctrl inp_buf_del_1: RET ; ----------------------------------------------------------------------------- get_byte_inp_buf: ADD A, #input_buffer MOV R0, A MOV A, @R0 CALL get_hex_nib SWAP A MOV B, A INC R0 MOV A, @R0 CALL get_hex_nib ORL A, B RET get_hex_nib: MOV R2, A ANL A, #0F0h CJNE A, #030h, get_hex_nib_1 SJMP get_hex_nib_2 get_hex_nib_1: CJNE A, #040h, get_hex_nib_3 MOV A, R2 ANL A, #00Fh CLR C SUBB A, #007h JNC get_hex_nib_3 MOV A, R2 ADD A, #009h ANL A, #00Fh RET get_hex_nib_2: MOV A, R2 ANL A, #00Fh CLR C SUBB A, #00Ah JNC get_hex_nib_3 MOV A, R2 ANL A, #00Fh RET get_hex_nib_3: CLR A RET put_byte_inp_buf: PUSH ACC SWAP A ANL A, #00Fh CLR C SUBB A, #00Ah JC put_byte_inp_buf_1 ADD A, #007h put_byte_inp_buf_1: ADD A, #03Ah CALL inp_buf_add POP ACC ANL A, #00Fh CLR C SUBB A, #00Ah JC put_byte_inp_buf_2 ADD A, #007h put_byte_inp_buf_2: ADD A, #03Ah CALL inp_buf_add RET ; ----------------------------------------------------------------------------- menu_init: MOV A, #000h MOV DPTR, #mnu_ CALL menu_make MOV A, #001h MOV DPTR, #mnu_crypt CALL menu_make MOV A, #002h MOV DPTR, #mnu_setup CALL menu_make MOV A, #003h MOV DPTR, #mnu_mon CALL menu_make MOV A, #004h MOV DPTR, #mnu_dc CALL menu_make MOV A, #005h MOV DPTR, #mnu_ CALL menu_make MOV A, #006h MOV DPTR, #mnu_ CALL menu_make MOV A, #007h MOV DPTR, #mnu_bksp CALL menu_make RET menu_make: ANL A, #007h MOV R3, A CALL lcd_rd_ctrl MOV R2, A MOV A, R3 MOV B, #005h MUL AB ADD A, #0C0h CALL lcd_wr_ctrl MOV R7, #004h menu_make_1: CLR A MOVC A, @A+DPTR CALL lcd_wr_data INC DPTR DJNZ R7, menu_make_1 MOV A, R3 RL A ADD A, #menu_start_adr MOV R0, A CLR A MOVC A, @A+DPTR MOV @R0, A INC DPTR INC R0 CLR A MOVC A, @A+DPTR MOV @R0, A INC DPTR MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl RET m_nop: LJMP main_0 ; ----------------------------------------------------------------------------- cpu_init: MOV P1, #0FFh MOV P2, #0E0h MOV P3, #0FFh MOV A, CKCON ; Speed for WatchDogTimer ANL A, #03Fh ORL A, #080h MOV CKCON, A MOV A, CKCON ; Speed for MOVX ANL A, #0F8h ORL A, #004h MOV CKCON, A MOV DPS, #000h CLR IE0 ; Interrupt Enable SETB IT0 CLR IE1 SETB IT1 MOV IE, #085h MOV EIE, #010h MOV WDCON, #000h MOV A, #003h ; TEI = 1 MOV dc_d2_tei, A MOV A, #001h ; Call Ref. = 1 MOV dc_d3_cr, A MOV rtc_cal, #020h MOV DPTR, #X_RTC_Ctrl MOV A, rtc_cal ; RTC Calibrate ANL A, #03Fh MOVX @DPTR, A RET ; ----------------------------------------------------------------------------- dsc_init: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_init MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_efcr MOVX @R0, A MOV A, #001h MOVX @R1, A MOV A, #DSCi_dmr4 MOVX @R0, A MOV A, #00Fh MOVX @R1, A MOV A, #DSCi_init MOVX @R0, A MOV A, #001h MOVX @R1, A MOV A, #DSCi_init2 MOVX @R0, A MOV A, #008h MOVX @R1, A MOV A, #DSCi_init2 MOVX @R0, A MOV A, #008h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #040h MOVX @R1, A MOV A, #DSCi_lmr2 MOVX @R0, A MOV A, #020h MOVX @R1, A MOV A, #DSCi_ppcr2 MOVX @R0, A MOV A, #001h MOVX @R1, A MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_mcr3 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_mcr4 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_mmr3 MOVX @R0, A MOV A, #002h MOVX @R1, A MOV A, #DSCi_mmr2 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_mmr1 MOVX @R0, A MOV A, #001h MOVX @R1, A MOV A, #DSCi_dmr1 MOVX @R0, A MOV A, #07Bh MOVX @R1, A MOV A, #DSCi_dmr2 MOVX @R0, A MOV A, #0FFh MOVX @R1, A MOV A, #DSCi_dmr3 MOVX @R0, A MOV A, #042h MOVX @R1, A MOV A, #DSCi_drlr MOVX @R0, A MOV A, #dc_buffer_max MOVX @R1, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_frar ; Adr1= $00, TEI MOVX @R0, A ; Adr2= $00, $FF MOV A, #000h ; Adr3= $FE, $FF MOVX @R1, A ; Adr4=($FE, $FF) MOVX @R1, A MOV A, #0FEh MOVX @R1, A MOV A, #DSCi_srar MOVX @R0, A MOV A, dc_d2_tei MOVX @R1, A MOV A, #0FFh MOVX @R1, A MOVX @R1, A MOV A, #DSCi_frar4 MOVX @R0, A MOV A, #0FEh MOVX @R1, A MOV A, #DSCi_srar4 MOVX @R0, A MOV A, #0FFh MOVX @R1, A MOV A, #DSCi_tar MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #003h MOVX @R1, A SETB EA RET ; ----------------------------------------------------------------------------- dsc_b_off: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #040h MOVX @R1, A SETB EA RET dsc_b1_plain: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #013h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #040h MOVX @R1, A SETB EA RET dsc_b2_plain: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #023h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #040h MOVX @R1, A SETB EA RET dsc_t_b1_plain: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #013h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #041h MOVX @R1, A SETB EA RET dsc_t_b2_plain: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #023h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #000h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #042h MOVX @R1, A SETB EA RET dsc_b1_crypt: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #016h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #073h MOVX @R1, A MOV A, #DSCi_mcr3 MOVX @R0, A MOV A, #082h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #040h MOVX @R1, A SETB EA RET dsc_b2_crypt: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #026h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #073h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #040h MOVX @R1, A SETB EA RET dsc_t_b1_crypt: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #016h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #073h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #041h MOVX @R1, A SETB EA RET dsc_t_b2_crypt: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_mcr1 MOVX @R0, A MOV A, #026h MOVX @R1, A MOV A, #DSCi_mcr2 MOVX @R0, A MOV A, #073h MOVX @R1, A MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #042h MOVX @R1, A SETB EA RET ; ----------------------------------------------------------------------------- lcd_status: CALL lcd_rd_ctrl MOV R2, A MOV A, #095h CALL lcd_wr_ctrl CALL lcd_str MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl RET lcd_init: MOV A, #038h CALL lcd_wr_ctrl MOV A, #038h CALL lcd_wr_ctrl MOV A, #038h CALL lcd_wr_ctrl MOV A, #00Eh CALL lcd_wr_ctrl MOV A, #006h CALL lcd_wr_ctrl MOV A, #001h CALL lcd_wr_ctrl RET lcd_str: CLR A MOVC A, @A+DPTR JZ lcd_str_1 CALL lcd_wr_data INC DPTR JMP lcd_str lcd_str_1: RET lcd_str_c: CLR A MOVC A, @A+DPTR JZ lcd_str_c_1 JB ACC.7, lcd_str_c_2 CALL lcd_wr_data JMP lcd_str_c_3 lcd_str_c_2: CALL lcd_wr_ctrl lcd_str_c_3: INC DPTR JMP lcd_str lcd_str_c_1: RET lcd_hex_byte: PUSH ACC SWAP A ANL A, #00Fh CLR C SUBB A, #00Ah JC lcd_hex_byte_1 ADD A, #007h lcd_hex_byte_1: ADD A, #03Ah CALL lcd_wr_data POP ACC ANL A, #00Fh CLR C SUBB A, #00Ah JC lcd_hex_byte_2 ADD A, #007h lcd_hex_byte_2: ADD A, #03Ah CALL lcd_wr_data RET lcd_wr_ctrl: PUSH DPL PUSH DPH CALL lcd_rd_bsy MOV DPTR, #X_LCD_Ctrl MOVX @DPTR, A POP DPH POP DPL RET lcd_wr_data: PUSH DPL PUSH DPH CALL lcd_rd_bsy MOV DPTR, #X_LCD_Data MOVX @DPTR, A POP DPH POP DPL RET lcd_rd_ctrl: PUSH DPL PUSH DPH CALL lcd_rd_bsy MOV DPTR, #X_LCD_Ctrl MOVX A, @DPTR POP DPH POP DPL RET lcd_rd_data: PUSH DPL PUSH DPH CALL lcd_rd_bsy MOV DPTR, #X_LCD_Data MOVX A, @DPTR POP DPH POP DPL RET lcd_rd_bsy: PUSH ACC MOV DPTR, #X_LCD_Ctrl lcd_rd_bsy_1: MOVX A, @DPTR JB ACC.7, lcd_rd_bsy_1 POP ACC RET ; ----------------------------------------------------------------------------- ; ----------------------------------------------------------------------------- dc_send_d3_byte: MOV DPS, #001h MOV DPTR, #X_Dc_Trans_Buf MOV DPL1, #007 MOVX @DPTR, A MOV A, #001h SJMP dc_send_d3 dc_send_d3_pack: MOV DPS, #000h CLR A MOVC A, @A+DPTR MOV R6, A DEC A MOV R7, A INC DPTR INC DPS MOV DPTR, #X_Dc_Trans_Buf MOV DPL1, #007h INC DPS dc_send_d3_pack_1: CLR A MOVC A, @A+DPTR INC DPTR INC DPS MOVX @DPTR, A INC DPTR INC DPS DJNZ R7, dc_send_d3_pack_1 MOV A, R6 dc_send_d3: ADD A, #007h MOV dc_trans_buf_l, A MOV DPS, #000h MOV DPTR, #X_Dc_Trans_Buf MOV A, #000h ; SAPI MOVX @DPTR, A INC DPTR MOV A, dc_d2_tei ; TEI MOVX @DPTR, A INC DPTR MOV A, dc_d2_ns ; N(S) MOVX @DPTR, A INC DPTR MOV A, dc_d2_nr ; N(R) MOVX @DPTR, A INC DPTR MOV A, #008h ; Protokoll Diskrimin. MOVX @DPTR, A INC DPTR MOV A, #001h ; Call Reference 1 MOVX @DPTR, A INC DPTR MOV A, dc_d3_cr ; Call Reference 2 MOVX @DPTR, A INC dc_d2_ns INC dc_d2_ns ; ----------------------------------------------------------------------------- dc_send: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data MOV DPS, #000h MOV DPTR, #X_DSC_dsr2 MOVX A, @DPTR JNB ACC.4, dc_send_err CLR EA MOV A, #DSCi_lsr MOVX @R0, A MOVX A, @R1 SETB EA ANL A, #007h CJNE A, #005h, dc_send_err CLR EA MOV DPS, #000h MOV DPTR, #X_DSC_DCB INC DPS MOV DPTR, #X_Dc_Trans_buf MOV A, dc_trans_buf_l CLR C SUBB A, #00Eh JC dc_send_2 MOV R7, #00Eh SJMP dc_send_1 dc_send_2: MOV R7, dc_trans_buf_l dc_send_1: MOVX A, @DPTR INC DPTR INC DPS MOVX @DPTR, A INC DPS DJNZ R7, dc_send_1 MOV A, DPL1 MOV dc_trans_buf_p, A MOV A, #DSCi_dtcr MOVX @R0, A MOV A, dc_trans_buf_l MOVX @R1, A CLR A MOVX @R1, A SETB EA CLR A RET dc_send_err: MOV A, #0FFh RET ; ----------------------------------------------------------------------------- dc_activate: MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data CLR EA MOV A, #DSCi_lmr1 MOVX @R0, A MOV A, #050h MOVX @R1, A SETB EA RET dc_sabme: MOV DPS, #000h MOV DPTR, #X_Dc_Trans_buf MOV A, #003h MOV dc_trans_buf_l, A MOV A, #000h MOVX @DPTR, A INC DPTR MOV A, dc_d2_tei MOVX @DPTR, A INC DPTR MOV A, #07Fh MOVX @DPTR, A INC DPTR CALL dc_send MOV dc_d2_ns, #000h MOV dc_d2_nr, #000h RET ; ----------------------------------------------------------------------------- isdn_d2_reciv: MOV dc_d2_rec_typ, #000h MOV DPS, #000h MOV DPTR, #X_Dc_Reciv_Buf MOVX A, @DPTR ; SAPI MOV C, ACC.1 ; C/R Bit MOV dc_d2_rec_typ.2, C ANL A, #0FDh JZ isdn_d2_reciv_1 SETB dc_d2_rec_typ.1 isdn_d2_reciv_1: INC DPTR MOVX A, @DPTR ; TEI CJNE A, #0FFh, isdn_d2_reciv_2 SETB dc_d2_rec_typ.0 isdn_d2_reciv_2: INC DPTR MOVX A, @DPTR ; N(S) MOV C, ACC.0 ; Info = 0 MOV dc_d2_rec_typ.3, C MOV C, ACC.1 ; RR/RNR/REJ = 0 MOV dc_d2_rec_typ.4, C MOV A, dc_d2_rec_typ ANL A, #01Fh MOV B, #003h MUL AB MOV DPTR, #isdn_d2_reciv_tab JMP @A+DPTR isdn_d2_reciv_tab: LJMP isdn_d2_get_d3 ; 000,TEI , C/R=0, Info LJMP isdn_d2_ignor ; 000,0FF , C/R=0, Info LJMP isdn_d2_ignor ; 0Fx,TEI , C/R=0, Info LJMP isdn_d2_ignor ; 0Fx,0FF , C/R=0, Info LJMP isdn_d2_get_d3 ; 000,TEI , C/R=1, Info LJMP isdn_d2_ignor ; 000,0FF , C/R=1, Info LJMP isdn_d2_ignor ; 0Fx,TEI , C/R=1, Info LJMP isdn_d2_ignor ; 0Fx,0FF , C/R=1, Info LJMP isdn_d2_ignor ; 000,TEI , C/R=0, Rxx LJMP isdn_d2_ignor ; 000,0FF , C/R=0, Rxx LJMP isdn_d2_ignor ; 0Fx,TEI , C/R=0, Rxx LJMP isdn_d2_ignor ; 0Fx,0FF , C/R=0, Rxx LJMP isdn_d2_rr ; 000,TEI , C/R=1, Rxx LJMP isdn_d2_ignor ; 000,0FF , C/R=1, Rxx LJMP isdn_d2_ignor ; 0Fx,TEI , C/R=1, Rxx LJMP isdn_d2_ignor ; 0Fx,0FF , C/R=1, Rxx LJMP isdn_d2_get_d3 ; 000,TEI , C/R=0, Info LJMP isdn_d2_ignor ; 000,0FF , C/R=0, Info LJMP isdn_d2_ignor ; 0Fx,TEI , C/R=0, Info LJMP isdn_d2_ignor ; 0Fx,0FF , C/R=0, Info LJMP isdn_d2_get_d3 ; 000,TEI , C/R=1, Info LJMP isdn_d2_ignor ; 000,0FF , C/R=1, Info LJMP isdn_d2_ignor ; 0Fx,TEI , C/R=1, Info LJMP isdn_d2_ignor ; 0Fx,0FF , C/R=1, Info LJMP isdn_d2_ignor ; 000,TEI , C/R=0, Ux LJMP isdn_d2_ignor ; 000,0FF , C/R=0, Ux LJMP isdn_d2_ignor ; 0Fx,TEI , C/R=0, Ux LJMP isdn_d2_ignor ; 0Fx,0FF , C/R=0, Ux LJMP isdn_d2_ignor ; 000,TEI , C/R=1, Ux LJMP isdn_d2_get_d3_u ; 000,0FF , C/R=1, Ux LJMP isdn_d2_ignor ; 0Fx,TEI , C/R=1, Ux LJMP isdn_d2_ignor ; 0Fx,0FF , C/R=1, Ux isdn_d2_ignor: RET isdn_d2_get_d3: INC dc_d2_nr INC dc_d2_nr CALL isdn_d3_reciv isdn_d2_rr: MOV DPS, #000h MOV DPTR, #X_Dc_Trans_Buf MOV A, #002h ; SAPI MOVX @DPTR, A INC DPTR MOV A, dc_d2_tei ; TEI MOVX @DPTR, A INC DPTR MOV A, #001h ; RR MOVX @DPTR, A INC DPTR MOV A, dc_d2_nr ; N(R) ORL A, #001h MOVX @DPTR, A MOV dc_trans_buf_l, #004h CALL dc_send RET isdn_d2_get_d3_u: MOV DPS, #001h MOV DPTR, #X_Dc_Reciv_Buf MOV DPL1, #006h MOVX A, @DPTR CJNE A, #005h, isdn_d2_get_d3_u_1 JB dc_status.3, isdn_d2_get_d3_u_1 JB dc_status.4, isdn_d2_get_d3_u_1 JB dc_status.5, isdn_d2_get_d3_u_1 MOV DPL1, #005h MOVX A, @DPTR ORL A, #080h MOV dc_d3_cr, A CALL isdn_d3_reciv_b_nr SETB dc_status.3 CALL dc_sabme MOV A, #002h CALL wait_period MOV A, #001h CALL dc_send_d3_byte isdn_d2_get_d3_u_1: RET isdn_d3_reciv: MOV DPS, #000h MOV DPTR, #X_Dc_Reciv_Buf MOV DPL, #007h MOVX A, @DPTR ANL A, #07Fh MOV B, #003h MUL AB MOV R0, A MOV DPS, #000h MOV DPTR, #isdn_d3_reciv_tab MOV A, DPL ADD A, R0 MOV DPL, A MOV A, DPH ADDC A, B MOV DPH, A CLR A JMP @A+DPTR isdn_d3_reciv_tab: LJMP isdn_d3_reciv_ignor ; 00 Esccape Code LJMP isdn_d3_reciv_ignor ; 01 Alerting LJMP isdn_d3_reciv_ignor ; 02 Call Progress LJMP isdn_d3_reciv_ignor ; 03 Progress LJMP isdn_d3_reciv_illegal ; 04 LJMP isdn_d3_reciv_setup ; 05 Setup LJMP isdn_d3_reciv_illegal ; 06 LJMP isdn_d3_reciv_ignor ; 07 Connect LJMP isdn_d3_reciv_illegal ; 08 LJMP isdn_d3_reciv_illegal ; 09 LJMP isdn_d3_reciv_illegal ; 0A LJMP isdn_d3_reciv_illegal ; 0B LJMP isdn_d3_reciv_illegal ; 0C LJMP isdn_d3_reciv_setup ; 0D Setup Ack LJMP isdn_d3_reciv_illegal ; 0E LJMP isdn_d3_reciv_ignor ; 0F Connect Ack LJMP isdn_d3_reciv_illegal ; 10 LJMP isdn_d3_reciv_illegal ; 11 LJMP isdn_d3_reciv_illegal ; 12 LJMP isdn_d3_reciv_illegal ; 13 LJMP isdn_d3_reciv_illegal ; 14 LJMP isdn_d3_reciv_illegal ; 15 LJMP isdn_d3_reciv_illegal ; 16 LJMP isdn_d3_reciv_illegal ; 17 LJMP isdn_d3_reciv_illegal ; 18 LJMP isdn_d3_reciv_illegal ; 19 LJMP isdn_d3_reciv_illegal ; 1A LJMP isdn_d3_reciv_illegal ; 1B LJMP isdn_d3_reciv_illegal ; 1C LJMP isdn_d3_reciv_illegal ; 1D LJMP isdn_d3_reciv_illegal ; 1E LJMP isdn_d3_reciv_illegal ; 1F LJMP isdn_d3_reciv_ignor ; 20 User Info LJMP isdn_d3_reciv_ignor ; 21 Suspend Rej LJMP isdn_d3_reciv_ignor ; 22 Resume Rej LJMP isdn_d3_reciv_illegal ; 23 LJMP isdn_d3_reciv_ignor ; 24 Hold LJMP isdn_d3_reciv_ignor ; 25 Suspend LJMP isdn_d3_reciv_ignor ; 26 Resume LJMP isdn_d3_reciv_illegal ; 27 LJMP isdn_d3_reciv_ignor ; 28 Hold Ack LJMP isdn_d3_reciv_illegal ; 29 LJMP isdn_d3_reciv_illegal ; 2A LJMP isdn_d3_reciv_illegal ; 2B LJMP isdn_d3_reciv_illegal ; 2C LJMP isdn_d3_reciv_ignor ; 2D Suspend Ack LJMP isdn_d3_reciv_ignor ; 2E Resume Ack LJMP isdn_d3_reciv_illegal ; 2F LJMP isdn_d3_reciv_ignor ; 30 Hold Rej LJMP isdn_d3_reciv_ignor ; 31 Retrieve LJMP isdn_d3_reciv_illegal ; 32 LJMP isdn_d3_reciv_ignor ; 33 Retrieve Ack LJMP isdn_d3_reciv_illegal ; 34 LJMP isdn_d3_reciv_illegal ; 35 LJMP isdn_d3_reciv_illegal ; 36 LJMP isdn_d3_reciv_ignor ; 37 Retrieve Rej LJMP isdn_d3_reciv_illegal ; 38 LJMP isdn_d3_reciv_illegal ; 39 LJMP isdn_d3_reciv_illegal ; 3A LJMP isdn_d3_reciv_illegal ; 3B LJMP isdn_d3_reciv_illegal ; 3C LJMP isdn_d3_reciv_illegal ; 3D LJMP isdn_d3_reciv_illegal ; 3E LJMP isdn_d3_reciv_illegal ; 3F LJMP isdn_d3_reciv_illegal ; 40 LJMP isdn_d3_reciv_illegal ; 41 LJMP isdn_d3_reciv_illegal ; 42 LJMP isdn_d3_reciv_illegal ; 43 LJMP isdn_d3_reciv_illegal ; 44 LJMP isdn_d3_reciv_ignor ; 45 Disconnect LJMP isdn_d3_reciv_ignor ; 46 Restart LJMP isdn_d3_reciv_illegal ; 47 LJMP isdn_d3_reciv_illegal ; 48 LJMP isdn_d3_reciv_illegal ; 49 LJMP isdn_d3_reciv_illegal ; 4A LJMP isdn_d3_reciv_illegal ; 4B LJMP isdn_d3_reciv_illegal ; 4C LJMP isdn_d3_reciv_release ; 4D Release LJMP isdn_d3_reciv_ignor ; 4E Restart Ack LJMP isdn_d3_reciv_illegal ; 4F LJMP isdn_d3_reciv_illegal ; 50 LJMP isdn_d3_reciv_illegal ; 51 LJMP isdn_d3_reciv_illegal ; 52 LJMP isdn_d3_reciv_illegal ; 53 LJMP isdn_d3_reciv_illegal ; 54 LJMP isdn_d3_reciv_illegal ; 55 LJMP isdn_d3_reciv_illegal ; 56 LJMP isdn_d3_reciv_illegal ; 57 LJMP isdn_d3_reciv_illegal ; 58 LJMP isdn_d3_reciv_illegal ; 59 LJMP isdn_d3_reciv_release ; 5A Release Compl LJMP isdn_d3_reciv_illegal ; 5B LJMP isdn_d3_reciv_illegal ; 5C LJMP isdn_d3_reciv_illegal ; 5D LJMP isdn_d3_reciv_illegal ; 5E LJMP isdn_d3_reciv_illegal ; 5F LJMP isdn_d3_reciv_ignor ; 60 Segment LJMP isdn_d3_reciv_illegal ; 61 LJMP isdn_d3_reciv_ignor ; 62 Facility LJMP isdn_d3_reciv_illegal ; 63 LJMP isdn_d3_reciv_ignor ; 64 Register LJMP isdn_d3_reciv_illegal ; 65 LJMP isdn_d3_reciv_illegal ; 66 LJMP isdn_d3_reciv_illegal ; 67 LJMP isdn_d3_reciv_illegal ; 68 LJMP isdn_d3_reciv_illegal ; 69 LJMP isdn_d3_reciv_illegal ; 6A LJMP isdn_d3_reciv_illegal ; 6B LJMP isdn_d3_reciv_illegal ; 6C LJMP isdn_d3_reciv_illegal ; 6D LJMP isdn_d3_reciv_ignor ; 6E Notify LJMP isdn_d3_reciv_illegal ; 6F LJMP isdn_d3_reciv_illegal ; 70 LJMP isdn_d3_reciv_illegal ; 71 LJMP isdn_d3_reciv_illegal ; 72 LJMP isdn_d3_reciv_illegal ; 73 LJMP isdn_d3_reciv_illegal ; 74 LJMP isdn_d3_reciv_ignor ; 75 Status Enquiry LJMP isdn_d3_reciv_illegal ; 76 LJMP isdn_d3_reciv_illegal ; 77 LJMP isdn_d3_reciv_illegal ; 78 LJMP isdn_d3_reciv_ignor ; 79 Congestion Control LJMP isdn_d3_reciv_illegal ; 7A LJMP isdn_d3_reciv_ignor ; 7B Information LJMP isdn_d3_reciv_illegal ; 7C LJMP isdn_d3_reciv_ignor ; 7D Status LJMP isdn_d3_reciv_illegal ; 7E LJMP isdn_d3_reciv_illegal ; 7F isdn_d3_reciv_illegal: RET isdn_d3_reciv_ignor: RET isdn_d3_reciv_release: CLR dc_status.3 CLR dc_status.4 CLR dc_status.5 MOV dc_d3_cr, #001h CALL dsc_b_off CALL lcd_rd_ctrl MOV R2, A MOV A, #0A0h CALL lcd_wr_ctrl MOV A, #'_' CALL lcd_wr_data MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl RET isdn_d3_reciv_setup: CALL isdn_d3_reciv_b_nr RET isdn_d3_reciv_b_nr: MOV DPS, #000h MOV DPTR, #X_Dc_Reciv_Buf MOV DPL, #002h MOVX A, @DPTR ANL A, #0EFh CJNE A, #003h, isdn_d3_reciv_b_nr_1 MOV DPL, #006h SJMP isdn_d3_reciv_b_nr_2 isdn_d3_reciv_b_nr_1: JB ACC.0, isdn_d3_reciv_b_nr_end MOV DPL, #007h isdn_d3_reciv_b_nr_2: MOVX A, @DPTR ANL A, #0F7h CJNE A, #005h, isdn_d3_reciv_b_nr_end isdn_d3_reciv_b_nr_3: INC DPTR MOV A, dc_reciv_buf_l CLR C SUBB A, DPL JC isdn_d3_reciv_b_nr_end MOVX A, @DPTR JB ACC.7, isdn_d3_reciv_b_nr_3 INC DPTR CJNE A, #018h, isdn_d3_reciv_b_nr_4 SJMP isdn_d3_reciv_b_nr_ok isdn_d3_reciv_b_nr_4: MOVX A, @DPTR MOV B, A MOV A, DPL ADD A, B MOV DPL, A SJMP isdn_d3_reciv_b_nr_3 isdn_d3_reciv_b_nr_end: MOV A, #000h RET isdn_d3_reciv_b_nr_ok: INC DPTR MOVX A, @DPTR MOV dc_bc_nr, A MOV B, A CALL lcd_rd_ctrl MOV R2, A MOV A, #0A0h CALL lcd_wr_ctrl MOV A, B ANL A, #003h ORL A, #030h CALL lcd_wr_data MOV A, R2 ORL A, #080h CALL lcd_wr_ctrl MOV A, B JB ACC.0, isdn_d3_reciv_b_nr_ok1 CALL dsc_t_b2_plain MOV A, B RET isdn_d3_reciv_b_nr_ok1: CALL dsc_t_b1_plain MOV A, B RET ; ----------------------------------------------------------------------------- wait_period: ANL A, #01Fh ADD A, period_timer CJNE A, period_timer, $ RET ; ----------------------------------------------------------------------------- ; ----------------------------------------------------------------------------- irq_add_kyb_buffer: MOV R2, A MOV A, kyb_data_p_irq MOV R0, A INC A ANL A, #007h MOV kyb_data_p_irq, A MOV A, R0 ADD A, #kyb_data_buffer MOV R0, A MOV A, R2 MOV @R0, A RET ; ----------------------------------------------------------------------------- irq_period: PUSH PSW PUSH ACC PUSH DPL PUSH DPH PUSH DPL1 PUSH DPH1 PUSH DPS SETB RS0 MOV A, WDCON ANL A, #0F4h ORL A, #001h MOV TA, #0AAh MOV TA, #055h MOV WDCON, A INC period_timer MOV A, period_timer ANL A, #007h JNZ irq_period_1 MOV A, #'p' CALL irq_add_kyb_buffer SJMP irq_period_end irq_period_1: MOV DPS, #000h MOV DPTR, #X_RTC_Min MOVX A, @DPTR CJNE A, period_min, irq_period_2 SJMP irq_period_end irq_period_2: MOV period_min, A MOV A, #'u' CALL irq_add_kyb_buffer irq_period_end: POP DPS POP DPH1 POP DPL1 POP DPH POP DPL POP ACC POP PSW RETI ; ----------------------------------------------------------------------------- irq_kyb: PUSH PSW PUSH ACC PUSH DPL PUSH DPH PUSH DPS SETB RS0 MOV DPS, #000h MOV DPTR, #X_KYB MOVX A, @DPTR ANL A, #01Fh MOV DPTR, #irq_kyb_tab MOVC A, @A+DPTR CALL irq_add_kyb_buffer POP DPS POP DPH POP DPL POP ACC POP PSW RETI irq_kyb_tab: DB 'D' ; 00 DB '6' ; 01 DB '4' ; 02 DB ' ' ; 03 DB 'C' ; 04 DB ' ' ; 05 DB '5' ; 06 DB ' ' ; 07 DB 'F' ; 08 DB '9' ; 09 DB '7' ; 0A DB ' ' ; 0B DB 'E' ; 0C DB ' ' ; 0D DB '8' ; 0E DB ' ' ; 0F DB 'H' ; 10 DB '#' ; 11 DB '*' ; 12 DB ' ' ; 13 DB 'G' ; 14 DB ' ' ; 15 DB '0' ; 16 DB ' ' ; 17 DB 'B' ; 18 DB '3' ; 19 DB '1' ; 1A DB ' ' ; 1B DB 'A' ; 1C DB ' ' ; 1D DB '2' ; 1E DB ' ' ; 1F ; ----------------------------------------------------------------------------- irq_isdn: PUSH PSW PUSH ACC PUSH DPL PUSH DPH PUSH DPL1 PUSH DPH1 PUSH DPS SETB RS0 MOV P2, #0E0h MOV R0, #R_DSC_CrIr MOV R1, #R_DSC_Data MOV DPS, #000h MOVX A, @R0 MOV dc_ir, A MOV DPTR, #X_DSC_dsr1 MOVX A, @DPTR MOV dc_dsr1, A MOV DPTR, #X_DSC_dsr2 MOVX A, @DPTR MOV dc_dsr2, A MOV DPTR, #X_DSC_der MOVX A, @DPTR MOV dc_der, A MOV A, #DSCi_lsr MOVX @R0, A MOVX A, @R1 MOV dc_lsr, A JNB dc_ir.0, irq_isdn_1 LCALL irq_isdn_dc_trans irq_isdn_1: JNB dc_ir.1, irq_isdn_2 LCALL irq_isdn_dc_reciv irq_isdn_2: JNB dc_ir.2, irq_isdn_3 LCALL irq_isdn_dc_stat irq_isdn_3: ; JNB dc_ir.3, irq_isdn_4 ; LCALL irq_isdn_dc_err irq_isdn_4: ; JNB dc_ir.4, irq_isdn_5 ; LCALL irq_isdn_bc irq_isdn_5: JNB dc_ir.5, irq_isdn_6 LCALL irq_isdn_lui irq_isdn_6: ; JNB dc_ir.6, irq_isdn_7 ; LCALL irq_isdn_dc_buf irq_isdn_7: ; JNB dc_ir.7, irq_isdn_8 ; LCALL irq_isdn_mfsb irq_isdn_8: POP DPS POP DPH1 POP DPL1 POP DPH POP DPL POP ACC POP PSW RETI ; ----------------------------------------------------------------------------- irq_isdn_dc_stat: JNB dc_dsr1.0, irq_isdn_dc_stat_1 LCALL irq_isdn_dc_stat_addr irq_isdn_dc_stat_1: JNB dc_dsr1.1, irq_isdn_dc_stat_2 LCALL irq_isdn_dc_reciv_cl irq_isdn_dc_stat_2: JNB dc_dsr1.6, irq_isdn_dc_stat_3 LCALL irq_isdn_dc_trans_cl irq_isdn_dc_stat_3: RET irq_isdn_dc_err: JNB dc_der.0, irq_isdn_dc_err_1 LCALL irq_isdn_dc_err_abort irq_isdn_dc_err_1: JNB dc_der.1, irq_isdn_dc_err_2 LCALL irq_isdn_dc_err_bit irq_isdn_dc_err_2: JNB dc_der.2, irq_isdn_dc_err_3 LCALL irq_isdn_dc_err_coll irq_isdn_dc_err_3: JNB dc_der.3, irq_isdn_dc_err_4 LCALL irq_isdn_dc_err_fcs irq_isdn_dc_err_4: JNB dc_der.4, irq_isdn_dc_err_5 LCALL irq_isdn_dc_err_ovfl irq_isdn_dc_err_5: JNB dc_der.5, irq_isdn_dc_err_6 LCALL irq_isdn_dc_err_unfl irq_isdn_dc_err_6: JNB dc_der.6, irq_isdn_dc_err_7 LCALL irq_isdn_dc_err_ovru irq_isdn_dc_err_7: JNB dc_der.7, irq_isdn_dc_err_8 LCALL irq_isdn_dc_err_unru irq_isdn_dc_err_8: JNB dc_dsr2.2, irq_isdn_dc_err_9 LCALL irq_isdn_dc_err_lost irq_isdn_dc_err_9: RET irq_isdn_lui: JNB dc_lsr.3, irq_isdn_lui_1 LCALL irq_isdn_lui_f3 irq_isdn_lui_1: JNB dc_lsr.4, irq_isdn_lui_2 LCALL irq_isdn_lui_f7 irq_isdn_lui_2: JNB dc_lsr.5, irq_isdn_lui_3 LCALL irq_isdn_lui_f8 irq_isdn_lui_3: JNB dc_lsr.7, irq_isdn_lui_4 LCALL irq_isdn_hsw irq_isdn_lui_4: RET irq_isdn_dc_buf: JNB dc_dsr2.0, irq_isdn_dc_buf_1 LCALL irq_isdn_dc_lbr irq_isdn_dc_buf_1: JNB dc_dsr2.0, irq_isdn_dc_buf_2 LCALL irq_isdn_dc_r_buf irq_isdn_dc_buf_2: JNB dc_dsr2.0, irq_isdn_dc_buf_3 LCALL irq_isdn_dc_lbt irq_isdn_dc_buf_3: JNB dc_dsr2.0, irq_isdn_dc_buf_4 LCALL irq_isdn_dc_t_buf irq_isdn_dc_buf_4: JNB dc_dsr2.0, irq_isdn_dc_buf_5 LCALL irq_isdn_dc_sec irq_isdn_dc_buf_5: RET irq_isdn_mfsb: RET ; ----------------------------------------------------------------------------- irq_isdn_dc_trans: MOV DPS, #000h MOV DPTR, #X_DSC_DCB INC DPS MOV DPTR, #X_Dc_Trans_buf MOV DPL1, dc_trans_buf_p MOV A, dc_trans_buf_l CLR C SUBB A, DPL1 JZ irq_isdn_dc_trans_3 JC irq_isdn_dc_trans_3 MOV R6, A CLR C SUBB A, #008h JC irq_isdn_dc_trans_2 MOV R7, #008h SJMP irq_isdn_dc_trans_1 irq_isdn_dc_trans_2: MOV A, R6 MOV R7, A irq_isdn_dc_trans_1: MOVX A, @DPTR INC DPTR INC DPS MOVX @DPTR, A INC DPS DJNZ R7, irq_isdn_dc_trans_1 MOV A, DPL1 MOV dc_trans_buf_p, A ; MOV A, #'d' ; CALL irq_add_kyb_buffer RET irq_isdn_dc_trans_3: ; MOV A, #'e' ; CALL irq_add_kyb_buffer RET irq_isdn_dc_reciv: MOV DPS, #000h MOV DPTR, #X_Dc_Reciv_buf MOV DPL, dc_reciv_buf_p INC DPS MOV DPTR, #X_DSC_DCB MOV R7, #010h irq_isdn_dc_reciv_1: MOVX A, @DPTR INC DPS MOVX @DPTR, A INC DPTR INC DPS DJNZ R7, irq_isdn_dc_reciv_1 MOV A, DPL MOV dc_reciv_buf_p, A ; MOV A, #'s' ; CALL irq_add_kyb_buffer RET irq_isdn_dc_stat_addr: RET irq_isdn_dc_reciv_cl: MOV A, #DSCi_drcr MOVX @R0, A MOVX A, @R1 MOV R2, A MOVX A, @R1 MOV A, R2 CLR C SUBB A, dc_reciv_buf_p MOV R2, A ; MOV dc_reciv_buf_l, A MOV DPS, #000h MOV DPTR, #X_Dc_Reciv_buf MOV DPL, dc_reciv_buf_p INC DPS MOV DPTR, #X_DSC_DCB MOV A, R2 MOV R7, A irq_isdn_dc_reciv_cl_1: MOVX A, @DPTR INC DPS MOVX @DPTR, A INC DPTR INC DPS DJNZ R7, irq_isdn_dc_reciv_cl_1 INC DPS MOV A, DPL MOV dc_reciv_buf_l, A MOV dc_reciv_buf_p, #000h MOV A, dc_der JNZ irq_isdn_dc_reciv_cl_2 MOV A, #'r' CALL irq_add_kyb_buffer irq_isdn_dc_reciv_cl_2: RET irq_isdn_dc_trans_cl: ; MOV A, #'c' ; CALL irq_add_kyb_buffer RET irq_isdn_dc_err_abort: RET irq_isdn_dc_err_bit: RET irq_isdn_dc_err_coll: RET irq_isdn_dc_err_fcs: RET irq_isdn_dc_err_ovfl: RET irq_isdn_dc_err_unfl: RET irq_isdn_dc_err_ovru: RET irq_isdn_dc_err_unru: RET irq_isdn_dc_err_lost: RET irq_isdn_bc: RET irq_isdn_lui_f3: RET irq_isdn_lui_f7: RET irq_isdn_lui_f8: RET irq_isdn_hsw: MOV A, #'o' JB dc_lsr.6, irq_isdn_hsw_1 MOV A, #'i' irq_isdn_hsw_1: CALL irq_add_kyb_buffer RET irq_isdn_dc_lbr: RET irq_isdn_dc_r_buf: RET irq_isdn_dc_lbt: RET irq_isdn_dc_t_buf: RET irq_isdn_dc_sec: RET ; ----------------------------------------------------------------------------- ; ----------------------------------------------------------------------------- dat_d3_setup_a: DB 00Ah ; lenght DB 005h, 004h, 003h, 080h, 090h, 0A3h, 07Dh, 002h DB 091h, 081h dat_d3_setup_d: DB 002h ; length DB 005h, 0 dat_d3_dail1: DB 005h DB 07Bh, 070h, 002h, 081h ; und eine Ziffer dat_d3_discon: DB 005h DB 045h, 008h, 002h, 080h, 090h ; ----------------------------------------------------------------------------- ; ----------------------------------------------------------------------------- txt_stack_error: DB 'Stack Error !',0 mnu_: DB ' ' DW m_nop mnu_bksp: DB ' <- ' DW m_bksp txt_main_menu: DB 'Main Menu ',0 mnu_main: DB 'Main' DW m_menu_main txt_crypt_menu: DB 'Crypt Menu',0 mnu_crypt: DB 'Cryp' DW m_menu_crypt txt_setup_menu: DB 'Setup Menu',0 mnu_setup: DB 'Setu' DW m_menu_setup txt_mon_menu: DB 'B-Mon Menu',0 mnu_mon: DB 'Mon ' DW m_menu_mon txt_dc_menu: DB 'D-Chn Menu',0 mnu_dc: DB 'D-Ch' DW m_menu_dc txt_rtc_menu: DB 'RTC Menu ',0 mnu_rtc: DB 'RTC ' DW m_menu_rtc mnu_dsci: DB 'DSCi' DW m_dsci mnu_mon_off: DB 'off ' DW m_mon_off mnu_mon_b1: DB 'M-B1' DW m_mon_b1 mnu_mon_b2: DB 'M-B2' DW m_mon_b2 mnu_mon_t_b1: DB 'T-B1' DW m_mon_t_b1 mnu_mon_t_b2: DB 'T-B2' DW m_mon_t_b2 mnu_c_mon_b1: DB 'M-B1' DW m_c_mon_b1 mnu_c_mon_b2: DB 'M-B2' DW m_c_mon_b2 mnu_c_mon_t_b1: DB 'T-B1' DW m_c_mon_t_b1 mnu_c_mon_t_b2: DB 'T-B2' DW m_c_mon_t_b2 mnu_1khz: DB '1kHz' DW m_1khz mnu_sabme: DB 'sabm' DW m_sabme mnu_s0ac: DB 'S0ac' DW m_s0ac mnu_lsr: DB 'lsr ' DW m_lsr mnu_dsr: DB 'dsr ' DW m_dsr mnu_set_tei DB 'TEI ' DW m_set_tei mnu_rtc_time: DB 'Time' DW m_rtc_time mnu_rtc_date: DB 'Date' DW m_rtc_date mnu_rtc_cal: DB 'Cal ' DW m_rtc_cal mnu_rtc_stop: DB 'Stop' DW m_rtc_stop mnu_rtc_go: DB 'Go ' DW m_rtc_go txt_hex_menu: DB 'Hex Menu ',0 mnu_hex: DB 'Hex ' DW m_hex_menu mnu_hex_a: DB ' A ' DW m_hex_a mnu_hex_b: DB ' B ' DW m_hex_b mnu_hex_c: DB ' C ' DW m_hex_c mnu_hex_d: DB ' D ' DW m_hex_d mnu_hex_e: DB ' E ' DW m_hex_e mnu_hex_f: DB ' F ' DW m_hex_f mnu_hex_back: DB 'back' DW m_hex_back ; ----------------------------------------------------------------------------- END